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RFIDsec 2013 - Tutorials |
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There will be three hands-on and lecture-style tutorials at RFIDsec 2013. The tutorials will be taking place on 9th of July at Graz University of Technology (IAIK). We will start at 09:00 in the IAIK seminar room. The direction to the IAIK building can be found here (png, 273 kB), using Google maps, or the exact address. Coffee breaks and lunch are included for tutorial participants. You may register for the tutorials by registering to the RFIDsec workshop.
Tutorial 1 (9th July, 09:00-10:30)
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RFID Introduction and the IAIK DemoTag: A Programmable RFID-Tag Emulator
Instructors: Thomas Korak, Raphael Spreitzer, and Hannes Gross (IAIK)
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Abstract:
In this tutorial, we give an introduction to Radio Frequency Identification (RFID) and present various tools for efficient RFID prototyping. First, an overview about RFID is given in general. After that, we will present the IAIK DemoTag which is an RFID-tag emulator that can be used to design, program, evaluate, and test existing or future RFID systems. We present HF as well as UHF-based RFID-tag emulators and also HF and UHF readers. All these devices are fully flexible and extendable and can be programmed using C and Assembler language as shown in a short framework demo. We also present FPGA-based tag emulators to evaluate self-designed hardware RFID-tag projects. Finally, we demonstrate various example demos using the DemoTags, e.g., RFID cloning of tags and smart cards or practial relay attacks over a bluetooth channel.
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Who should attend:
The tutorial should attract RFIDsec attendees, students who would like to learn about RFID and who are interested in RFID-tag prototyping, teachers and trainers who would like to know about the DemoTag to use it for educational and academic purposes, and employees from industry who want to use the DemoTag for RFID-product demonstrations.
About the Speakers:
Thomas Korak has a degree in IT-Security and is presently a PhD student at the Institute for Applied Information Processing and Communications (IAIK) at the University of Technology in Graz (TU Graz). His main fields of research include side-channel analysis on contact-based devices (e.g., microcontrollers) as well as contactless devices (e.g., RFID tags) as well as fault-injection methods. He also focuses on lightweight countermeasures which can be included into constrained devices like RFID tags in order to increase the effort for successful SCA attacks. He is also interested in hardware design, especially VLSI design.
Raphael Spreitzer finished the master's program in Software Development and Business Management at Graz University of Technology and is now a PhD student at the Institute for Applied Information Processing and Communications (IAIK). His research interests include side-channel attacks with a special focus on cache attacks on mobile devices, e.g., smartphones. Furthermore, he investigates concepts to ensure the user's privacy and security in mobile environments in general.
Hannes Gross graduated in 2013 and received his master's degree in computer science at TU Graz. During his master studies, he specialized on RFID and hardware design and worked on several projects in this field of research. Among other works, his master’s thesis was about the implementation of an EPC Gen 2 RFID tag as an authentication device. He is currently a PhD student at the Institute for Applied Information Processing and Communications (IAIK).
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Tutorial 2 (9th July, 11:00-12:30)
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Side-Channel Attacks and Fault Analysis
Instructors: Johann Heyszl (Fraunhofer AISEC) and Thomas Korak (IAIK)
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Abstract:
At the beginning, participants will receive basic information on
side-channel analysis (SCA) and fault attacks. We discuss different
types of side channels which can be used for analysis and present
several methods to induce faults in cryptographic devices.
In a more specific part, practical aspects and experience from the field
of high-resolution electromagnetic measurements for side-channel
analysis are presented.
In the practical part of the tutorial, the participants will receive
pre-measured side-channel data (power consumption traces) of an AES-128
implementation. Using this data and a tool to apply statistical methods, we show how to extract the secret key out of the measured power traces.
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Who should attend:
Beginners who want to gain basic knowledge about side-channel analysis (SCA) attacks as well as fault attacks (FA). Interested attendees may be Bachelor and MSc students working in the field of security in general, PhD students with advanced knowledge, or engineers who implement cryptographic algorithms and who want to learn about side-channel leakages of cryptographic implementations and the potential of fault attacks.
About the Speakers:
Johann Heyszl is heading the hardware security research department at Fraunhofer AISEC in Munich, Germany. He recently submitted his PhD thesis about high-resolution electromagnetic side-channel measurements of cryptographic implementations at TU München and holds a Dipl.-Ing. degree from TU Graz.
Thomas Korak has a degree in IT-Security and is presently a PhD student at the Institute for Applied Information Processing and Communications (IAIK) at the University of Technology in Graz (TU Graz). His main fields of research include side-channel analysis on contact-based devices (e.g., microcontrollers) as well as contactless devices (e.g., RFID tags) as well as fault-injection methods. He also focuses on lightweight countermeasures which can be included into constrained devices like RFID tags in order to increase the effort for successful SCA attacks. He is also interested in hardware design, especially VLSI design.
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Tutorial 3 (9th July, 15:30-17:00)
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Cryptographic Hardware Design and Performance Metrics
Instructors: Frank K. Gürkaynak (ETH Zurich)
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Abstract:
In this talk the ASIC digital design flow for cryptographic hardware
will be explained with practical examples. The cost of designing your
own ASICs makes such a design flow only viable when you either have a
very high volume production, or when you need to achieve extremes in
performance such as smallest area, lowest power/energy consumption and
highest speed/performance. However, there are many factors that are
frequently overlooked when the performance parameters are estimated for
hardware. Based on several example designs in cryptographic hardware we
will show what kind of mistakes are frequently made while reporting
performance parameters in the literature.
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Who should attend:
Engineers who are interested in evaluating the performance of
cryptographic hardware, system designers who are interested in the
digital design process and cryptographers who want get an idea about
what the bottlenecks are in hardware realization of cryptographic
algorithms.
About the Speaker:
Frank Kagan Gurkaynak was born in Istanbul and obtained his BSc. and
M.Sc. degrees from Electrical and Electronical Engineering Department of
the Istanbul Technical University. He was with the Signal Processing
Laboratory (formerly C3i) of the EPFL in 1997 and later started his
Ph.D. studies at the Electrical and Computer Engineering department of
the Worcester Polytechnic Institute working with the Analog / Digital
Microelectronics Group. He worked at the Integrated Systems Laboratory
(IIS) of ETH Zurich from 2000 till 2006 and completed his Ph.D.. He
worked as a postdoctoral researcher at the Integrated Systems Laboratory
(LSI) and Microelectronic Systems Laboratory (LSM) of the EPFL until
June 2008. Currently he is employed by the Microelectronics Design
Center of ETH Zurich. His research interests include design of VLSI
systems, full-custom design, globally-asynchronous locally-synchronous
systems, cryptography, and Lab-on-Chip systems.
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Tutorials Location/Address:
Graz University of Technology,
Institute for Applied Information Processing and Communications (IAIK),
Inffeldgasse 16a,
8010 Graz
If you have any questions or other issues concerning the tutorials, please contact rfidsec2013@iaik.tugraz.at.
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